Record ADC for next-generation software defined radio
Wednesday, June 11, 2014 - 07:31
in Mathematics & Economics
Nanoelectronics research centre imec will present at this week's VLSI circuits symposium 2014 (Honolulu, June 13) a low power pipelined SAR (successive-approximation register) ADC (analog to digital converter) in 28nm digital CMOS with record resolution, speed and power performance. The novel ADC targets wireless receivers for next-generation software defined radio, including wireless standards such as LTE-advanced and the emerging generation of Wi-Fi (IEEE802.11ac).