Imec and Atrenta develop exploration flows for 3D ICs
Tuesday, May 24, 2011 - 12:00
in Mathematics & Economics
Atrenta Inc., a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries, in collaboration with imecs 3D integration IIAP (industrial affiliation program), have jointly developed an advanced planning and partitioning design flow for heterogeneous 3D stacked ICs. Imec and Atrenta will be demonstrating this flow at the Design Automation Conference (DAC) in San Diego, CA from June 6 8, 2011.